Configuration Sharing to Reduce Reconfiguration Overhead Using Static Partial Reconfiguration
نویسندگان
چکیده
منابع مشابه
Reconfiguration of distribution systems to improve reliability and reduce power losses using Imperialist Competitive Algorithm
Distribution systems can be operated in multiple configurations since they are possible combinations of radial and loop feeders. Each configuration leads to its own power losses and reliability level of supplying electric energy to customers. In order to obtain the optimal configuration of power networks, their reconfiguration is formulated as a complex optimization problem with different objec...
متن کاملPartial Run-Time Reconfiguration Using JRTR
Much has been written about the design and performance advantages of partial Run-Time Reconfiguration (RTR) over the last decade. While the results have been promising, commercial support for partial RTR has lagged. Until the introduction of the Xilinx Virtex family of devices, no mainstream, commercial FPGA has provided support for this capability. In this paper we describe JRTR, a software pa...
متن کاملPartial Reconfiguration using FPGA – A Review
This paper proposes a review on Partial reconfiguration using Field Programmable Gate Array (FPGA). By downloading configuration bit files Partial Dynamic Reconfiguration (PDR) dynamically modifies the hardware portion of the device. Both FPGA and reconfigurable are used to speed up the performance of various applications. This makes the FPGA to be used in new dimension with an advantage of mor...
متن کاملError Recovery Mechanism using Dynamic Partial Reconfiguration
In this paper an error recovery mechanism for SRAM based FPGA systems is presented. Previous recovery methods employ processor cores as a reconfiguration controller consuming notable amount of device resources and introducing additional error detection and recovery latency. The described mechanism is controlled by a finite state machine architecture providing small hardware overhead and short r...
متن کاملReducing the dynamic FPGA reconfiguration overhead
Dynamic hardware generation reduces the number of FPGA resources needed and speeds up the application by optimizing the configuration for the exact problem at hand at run-time. If the problem changes, the system needs to be reconfigured. When this occurs too often, the total reconfiguration overhead is too high and the benefit of using dynamic hardware generation vanishes. Hence, it is importan...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: IEICE Transactions on Information and Systems
سال: 2008
ISSN: 0916-8532,1745-1361
DOI: 10.1093/ietisy/e91-d.11.2675